1. Field of the Invention
The present invention relates to a circuit-incorporating light receiving device in which a photodiode for converting received light into an electrical signal and an integrated circuit for processing the converted signal are provided on a single silicon substrate, and to a method for fabricating the circuit-incorporating light receiving device.
2. Description of the Related Art
Circuit-incorporating light receiving devices are mainly used in optical pickups. For example, the circuit-incorporating light receiving devices detect a focus error signal which is in turn used to bring light of a semiconductor laser to a focus on a disk. Alternatively, the devices may detect a radial error signal which is in turn used to bring laser light to a pit on a disk (tracking). Recently, optical pickups are used in CD-ROM or DVD-ROM drives and the like which are becoming increasingly faster. There is a demand for a high-speed and high-performance circuit-incorporating light receiving device which may be used in such optical pickups.
FIG. 10 shows a conventional circuit-incorporating light receiving device 500 (Japanese Patent Publication No. 2731115) which has a split photodiode structure. A feature of the split photodiode structure shown in FIG. 10 is that an N-type buried diffusion layer 103 and a P-type diffusion layer 109 are provided so as to reduce a diffusion current having a slow response. A semiconductor substrate 101 is made of P-type  less than 111 greater than  40 xcexa9cm so as to reduce a junction capacitance. The use of such a material leads to expansion of a depletion layer, resulting in a decrease in a distance over which diffusing carriers having a low mobility are moved. For this reason, the response of a photodiode is improved. The photodiode portion of the device 500 attains a response of about 30 MHz as fc(xe2x88x923 dB).
A silicon nitride film 111 as an antireflection film is further provided on the P-type diffusion layer 109. The reflectance of the device 500 is thus reduced with respect to a laser wavelength of about 780 nm which is used for a CD-ROM.
In the integrated circuit portion of the circuit-incorporating light receiving device 500, elements are isolated from each other using PN junction isolation. Arsenic (As+) and Boron (B+) are implanted into an emitter and a base, respectively, with ion implantation. A resulting NPN transistor has a fTmax of about 3 GHz. The integrated circuit portion of the device 500 attains a response of about 20 MHz.
Hereinafter, a fabrication process of the circuit-incorporating light receiving device 500 will be described with reference to FIGS. 11A through 11H.
On the P-type  less than 111 greater than  40 xcexa9cm substrate 101, as shown in FIG. 11A, a P-type buried diffusion layer 102 is provided in an isolation region and a region splitting the photodiode. The N-type buried diffusion layer 103 is provided in the photodiode portion for the purpose of improving the response of the split photodiode. The N-type buried diffusion layer 103 is provided in the NPN transistor portion. An N-type epitaxial layer 104 is provided on the buried diffusion layers 102 and 103.
Next, as shown in FIG. 11B, a P-type diffusion layer 105, a base region (not shown) of a vertical PNP (V-PNP) transistor, and a collector compensation diffusion layer 106 of the NPN transistor portion are provided.
Next, as shown in FIG. 11C, boron ion implantation provides the base region (internal base region 107 and external base region 108) of the NPN transistor; the emitter region (not shown) of the V-PNP transistor; and the P-type diffusion layer 109 for improving the response of the split photodiode.
Next, as shown in FIG. 11D, an emitter region 110 of the NPN transistor is provided by arsenic ion implantation.
Next, as shown in FIG. 11E, a field silicon oxidization film is removed from a split photodiode light receiving region. The silicon nitride film 111 is provided on the split photodiode light receiving region by CVD. In this way, an antireflection film having the intended thickness can be obtained.
Next, as shown in FIG. 11F, a silicon oxidization film of a contact portion is etched. A first layer conductor 112A made of AlSi is then provided by sputtering. A conductor portion 112 is provided by dry etching. In this case, a portion of AlSi which exists on the light receiving region of the split photodiode is not etched. The reasons are follows. The dry etching reduces the silicon nitride film 111 as the antireflection film. Plasma generated in the dry etching damages the photodiode, degrading the leakage characteristic of the photodiode.
Next, an interlayer insulating film 113 is provided and a through hole is provided in the integrated circuit. The interlayer insulating film 113 provided on the photodiode is removed by etching. As shown in FIG. 11G, an AlSi film is provided by sputtering and then patterned to provide a second layer conductor 114 while removing AlSi from the photodiode light receiving region.
Finally, as shown in FIG. 11H, the second layer conductor 114 and the split photodiode portion (first layer conductor 112A and second layer conductor 114) which are made of AlSi are etched by wet etching. Dry etching would reduce the silicon nitride film 111 as the antireflection film and degrades the leakage characteristic of the photodiode. Thereafter, a cover insulating film 115 is provided.
Thus, the circuit-incorporating light receiving element 500 shown in FIG. 10 is obtained. Recently, there is a demand for a high-speed circuit-incorporating light receiving device. An attempt is made to achieve a high-speed split photodiode and a high-speed integrated circuit.
To obtain a higher-speed split photodiode, a CR time constant needs to be decreased. Specifically, photodiode capacitance Cpd or series resistance Rs needs to be decreased.
Japanese Laid-Open Publication No. 10-107243 proposes an exemplary structure of a photodiode shown in FIG. 12. Such a structure provides the N-type buried diffusion layer 103 only on a portion which actually receives laser light from a semiconductor laser. This photodiode has a reduced junction area and thus achieves a reduction in junction capacitance while retaining the improved response due to the structure shown in FIG. 10. In this case, in an area receiving light, there is a junction between the P-type diffusion layer 109 and the N-type epitaxial layer 104. For this reason, a silicon thermal oxidation film 116 as an antireflection film is required. If a deposition film is provided directly on a silicon film by CVD or the like, there is an increased leakage current at the junction between the P-type diffusion layer 109 and the N-type epitaxial layer 104, which are positioned at a surface portion. To avoid this, the silicon thermal oxidation film 116 is provided.
Each transistor needs to become fast to obtain a high-speed integrated circuit. In the case of an NPN transistor, for example, an effective way is to reduce the capacitance between the emitter and the base. To this end, impurity concentrations of the emitter and the base need to be decreased or an area between the emitter and the base needs to be decreased. However, the former strategy is not available because the carrier injection efficiency is reduced and the current amplification factor (hFE) is thus decreased.
To achieve a reduced area between the emitter and the base, an attempt is made to develop a lithography technique such that an alignment margin of a mask is reduced as much as possible. A structural approach is also made to minimize the area between the emitter and the base. For example, polycrystalline silicon which is doped with an N-type semiconductor such as arsenic is used as an emitter diffusion source (polycrystalline silicon emitter) or an electrode. In such a technique, emitter diffusion and the alignment margin of the contact are not necessary. The area between the emitter and the base thus can be reduced, thereby reducing the capacitance between the emitter and the base.
The use of the polycrystalline silicon emitter also allows formation of a shallow emitter diffusion and a base diffusion. The width of the base can also be reduced, thereby obtaining a higher-speed photodiode.
The use of the polycrystalline silicon emitter is also effective in reducing the capacitance between the base and the collector. The reduced emitter area leads to a reduction in the base area.
For the purpose of isolation, LOCOS (local oxidization of silicon) may be used. This technique allows formation of a walled base structure which can reduce the capacitance between the base and the collector. The capacitance between the collector and the substrate also can be reduced.
The use of the above-described polycrystalline silicon emitter leads to an improvement in fTmax of the NPN transistor from about 3 GHz (for the conventional NPN transistors) to about 6 GHz.
There are a number of problems with the above-described high-speed circuit-incorporating light receiving device in which the split photodiode shown in FIG. 12 and the high-speed integrated circuit having the polycrystalline silicon emitter and the LOCOS are provided on a single substrate.
The problems are classified into two groups, namely problems A and B. Problem A is in connection with formation of the antireflection film on the split photodiode and problem B is in connection with a LOCOS process of isolation. Problem A includes the following:
A1. a reduction in yield of the transistor;
A2. variations in transistor characteristics due to variations in the thickness of the through oxidization films; and
A3. a reduction in the antireflection film (an increase in a reflectance and an increase in variation). These problems will be described below.
A1. A Reduction in Yield of the Transistor
The split photodiode shown in FIG. 12 has an increased leakage current at a light receiving surface thereof when a deposition film as an antireflection film is provided by CVD or the like on the junction between the P-type diffusion layer 109 and the N-type epitaxial layer 104 and on a light receiving surface of the split photo diode. For this reason, as the antireflection film, the silicon thermal oxidization film 116 is required. To this end, a polycrystalline silicon doped with an N-type semiconductor such as arsenic is provided; emitter diffusion is thereafter obtained by carrying out an appropriate thermal treatment; and thermal oxidization is carried out. It has been found, however, that a yield of the transistors is reduced due to a crystal defect.
A2. Variations in Transistor Characteristics Due to Variations in the Thickness of the Through Oxidization Films
An inside base region of the NPN transistor is typically provided by ion implantation through an oxidization film (a through oxidization film). Variations in the thickness of the through oxidization film leads to an uneven profile of the impurity concentration of implanted ions. When the formation of the inside base region is carried out after the antireflection film is formed on the photodiode, the through oxidization film on the inside base region is reduced due to the preprocess and etching upon the formation of the antireflection film. This causes variations in the film thickness, i.e., variations in the concentration profile of the inside base region, resulting in variations in transistor characteristics. To avoid this, the through oxidization film may be provided after the formation of the antireflection film. This leads to an increase in manufacturing cost since the silicon oxidization film previously provided needs to be removed and oxidized, i.e., additional processes.
A3. A Reduction in the Antireflection Film (An Increase in a Reflectance and an Increase in Variation).
When the polycrystalline silicon emitter is used, a barrier metal needs to be provided between AlSi used for an actual conductor material and the polycrystalline silicon Si. TiW or the like may be used as the barrier metal. Typically, the barrier metal and the conductor (the first layer in the case of multiple conductor layers) are simultaneously provided by sputtering and etching. The etching for the barrier metal is dry etching. Patterning by dry etching is preferable when a reduced width of conductor is required for a small-size IC. However, the antireflection film which has had the intended thickness is etched by the dry etching. The reflectance which has been designed to have the lowest value is thus impaired and variations in the reflectance become significant. Moreover, damage due to plasma generated in the dry etching leads to an increase in leakage current.
B. Cross-Talk Characteristics Due to a LOCOS Process of Isolation A isolation diffusion layer 5 (FIG. 13C) is provided in the following way. Typically, a silicon nitride film 7 which determines an active region is provided as shown in FIG. 13A. Boron ions are then implanted into a region which is to be the isolation diffusion layer 5. The boron ions are further pushed downward by LOCOS as shown in FIG. 13C. The LOCOS is applied to all regions which will isolate elements from each other (hereinafter, referred to as LOCOS isolation). A process is generated at an interface between a region which is subjected to the LOCOS and a region which is not subjected to the LOCOS (such a process is hereinafter referred to as a LOCOS process).
Accordingly, the LOCOS process is generated at a separating portion of the split photodiode as shown in FIG. 14. The LOCOS process causes incident light to be scattered, so that the split photodiode cannot receive uniform incident light. This may lead to degradation of cross-talk characteristics.
When a high-speed integrated circuit and a high-speed split photodiode are provided on a single substrate using the polycrystalline silicon emitter and the LOCOS isolation, the above-described problems should be solved.
According to an aspect of the present invention, a circuit-incorporating light receiving device includes an integrated circuit and a photodiode. The integrated circuit and the photodiode are provided on a single semiconductor substrate. The integrated circuit includes a transistor having a polycrystalline silicon as an emitter diffusion source and an electrode. Elements included in the integrated circuit are isolated from each other using local oxidization.
In one embodiment of this invention, the semiconductor substrate includes a semiconductor substrate of a first conductivity type. The photodiode includes a first semiconductor layer of a second conductivity type provided on the semiconductor substrate of the first conductivity type and a semiconductor layer of the first conductivity type splitting the first semiconductor layer of the second conductivity type into a plurality of semiconductor layers of the second conductivity type. The photodiode includes a plurality of split photodiodes for detecting a light signal using the first semiconductor layer of the second conductivity type and the semiconductor layer of the first conductivity type. Light receiving regions of the plurality of split photodiodes and a surface of the semiconductor layer of the first conductivity type are subjected to local oxidization.
In one embodiment of this invention, the semiconductor substrate includes a semiconductor substrate of a first conductivity type. The photodiode includes a first semiconductor layer of a second conductivity type provided on the semiconductor substrate of the first conductivity type and a semiconductor layer of the first conductivity type splitting the first semiconductor layer of the second conductivity type into a plurality of semiconductor layers of the second conductivity type. The photodiode includes a plurality of split photodiodes for detecting a light signal using the first semiconductor layer of the second conductivity type and the semiconductor layer of the first conductivity type. Light receiving regions of the plurality of split photodiodes and a surface of the semiconductor layer of the first conductivity type are not subjected to local oxidization.
In one embodiment of this invention, an antireflection film is provided on a light receiving region of the photodiode. The antireflection film includes a silicon oxidization film.
In one embodiment of this invention, the antireflection film further includes a silicon nitride film provided on the silicon oxidization film.
According to another aspect of the present invention, a method is provided for fabricating a circuit-incorporating light receiving device including an integrated circuit and a photodiode, wherein the integrated circuit and the photodiode are provided on a single semiconductor substrate. The integrated circuit includes a transistor having a polycrystalline silicon as an emitter diffusion source and an electrode. Elements included in the photodiode are isolated from each other using local oxidization. The semiconductor substrate includes a semiconductor substrate of a first conductivity type. The photodiode includes a first semiconductor layer of a second conductivity type provided on the semiconductor substrate of the first conductivity type and a semiconductor layer of the first conductivity type splitting the first semiconductor layer of the second conductivity type into a plurality of semiconductor layers of the second conductivity type. The photodiode includes a plurality of split photodiodes for detecting a light signal using the first semiconductor layer of the second conductivity type and the semiconductor substrate of the first conductivity type. The method includes the processes of: (a) isolating the elements included in the photodiode by the local oxidization; and (b) forming the transistor using the polycrystalline silicon.
In one embodiment of this invention, the plurality of split photodiodes include a first split photodiode and a second split photodiode, and an antireflection film is provided on a light receiving region of the first split photodiode and a light receiving region of the second split photodiode. The antireflection film includes a first silicon oxidization film. The method further includes the processes of: (c) forming the antireflection film on light receiving regions of the plurality of split photodiodes, wherein process (c) is performed before process (b).
In one embodiment of this invention, the antireflection film further includes a silicon nitride film provided on the first silicon oxidization film.
In one embodiment of this invention, the method further includes the process of: (d) forming an inside base region of the transistor in the integrated circuit, wherein process (d) is performed after process (a).
In one embodiment of this invention, the local oxidization is applied to the light receiving regions of the plurality of split photodiodes and a light receiving region of the semiconductor layer of the first conductivity type. The method further includes the process of: (e) forming an inside base region of the transistor in the integrated circuit.
In one embodiment of this invention, the method further includes the process of: (f) forming an inside base region of the transistor in the integrated circuit, wherein process (f) is performed after process (a).
In one embodiment of this invention, the local oxidization is applied to the light receiving regions of the plurality of split photodiodes and a light receiving region of the semiconductor layer of the first conductivity type. The antireflection film is provided for the light receiving regions of the plurality of split photodiodes. The antireflection film includes a first silicon oxidization film. The antireflection film further includes a silicon nitride film provided on the first silicon oxidization film. The method further includes the process of: (g) forming a second silicon oxidization film on the light receiving regions of the plurality of split photodiodes.
In one embodiment of this invention, process (c) includes the process of simultaneously forming the first silicon oxidization film and a through oxidization film, the through oxidization being used for forming the inside base region of the transistor.
In one embodiment of this invention, the first silicon oxidization film has a thickness of about 10 nm to about 40 nm.
In one embodiment of this invention, the antireflection film further includes a first silicon nitride film provided on the first silicon oxidization film. The method further includes the process of simultaneously forming the first silicon nitride film and a second silicon nitride film, the second silicon nitride film being provided on a silicon nitride film capacitor portion of the integrated circuit.
In one embodiment of this invention, the antireflection film further includes a silicon nitride film provided on the first silicon oxidization film. The method further includes the process of: (h) forming a second silicon oxidization film on the silicon nitride film, the second silicon oxidization film protecting the silicon nitride film.
In one embodiment of this invention, the method further includes the process of: (i) etching the second silicon oxidization film after all dry etching processes.
In one embodiment of this invention, the method further includes the process of: (j) etching a cover insulating film. Process (j) is performed after process (i).
In one embodiment of this invention, the semiconductor substrate includes a semiconductor of a first conductivity type having a high specific resistance.
In one embodiment of this invention, the semiconductor substrate includes a semiconductor substrate of a first conductivity type having a low specific resistance; and an epitaxial layer of the first conductivity type having a high specific resistance, the epitaxial layer of the first conductivity type being provided on the semiconductor substrate of the first conductivity type.
Thus, the invention described herein makes possible the advantages of providing (1) a circuit-incorporating light receiving device in which a high-speed integrated circuit and a high-speed split photodiode are provided on a single substrate using the polycrystalline silicon emitter and the LOCOS isolation, and a fabrication method thereof; (2) a circuit-incorporating light receiving device having a satisfactory yield of transistors, and a fabrication method thereof; (3) a circuit-incorporating light receiving device having a narrow range of variations in transistor characteristics which are otherwise caused due to variations in the thickness of a through oxidization film, and a fabrication method thereof; (4) a circuit-incorporating light receiving device in which an antireflection film has a thickness optimally designed to lower a reflectance and variations in the reflectance are minimized, and a fabrication method thereof; and (5) a circuit-incorporating light receiving device having satisfactory cross-talk characteristics, and a fabrication method thereof.
These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.